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NI MC-MXI
@0DFF.ADF "National Instruments MC-MXI
Adapter" MC-MXI User Manual May 1994, Part Number 320297-01 NI-VXI software for Win3.x ? MC-MXI Adapter, Top [image from Artisan Technology Group] ![]() Three large-scale components: • SMC 94C18 Micro Channel controller chip implements the mandatory logic functions of the Micro Channel bus and contains support for the POS registers and some local configuration registers. • The National Instruments Message-Based Interface Gate Array (MIGA) implements the MXIbus registers. • The Intel 82C54 Peripheral Interface Timer (PIT) contains registers that establish time limits for Micro Channel and MXIbus operations. My SWAG is the SIX internal MXI bus terminators are the DIP resistor networks just to the left of the DB62 connector. Or maybe they are the light colored SIPs? MC-MXI Adapter, Bottom [image from Artisan Technology Group] ![]() DB62 Connector Pin-out [MXIbus] ![]()
* means signal is active low ADF Sections 0DFF.ADF "National Instruments MC-MXI Adapter" NumBytes 4 FixedResources pos[0]=1XXXXXXXb Memory Window for MC-MXI DOS The DOS interface can use 7 different windows. Choosing 'None Requested' will not allow DOS NIVXI applications to execute, and should only be used to avoid memory conflicts. <"0d0000h-0dffffh">, c0000h-0cffffh, 0b0000h-0bffffh, 0a0000h-0affffh, 090000h-09ffffh, 080000h-08ffffh, None Requested, 0e0000h-0effffh Memory Window for MC-MXI Windows The Windows interface can use 3 different windows. Choosing 'None Requested' will force Windows NIVXI applications to use the DOS (lower memory) window, and should only be used to avoid memory conflicts." <"f9ff0000h-fbffffffh>, b9ff0000h-bbffffffh, 79ff0000h-7bffffffh, None Requested I/O Register Area I/O register areas. <"0c000h-0d7ffh">, e000-f7ff, 0000-17ff, 2000-37ff, 4000-57ff, 6000-77ff, 8000-97ff, a000-0b7ff Bus Interrupt Level Change only if in conflict with another assignment <"10">, 11, 15, 5 LA Interrupt Level [Logical Address] Change only if in conflict with another assignment <"10">, 11, 15, 5 MXI Master DMA Arbitration Level All levels EXCEPT "NONE"are commented out. Change only if in conflict with another assignment. This is currently disabled. <" 3">, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, None, 0, 1, 2 MXI Slave DMA Arbitration Level Changed only if in conflict with another assignment <" 8">, 9, 10, 11, 12, 13, 14, None, 0, 1, 2, 3, 4, 5, 6, 7 Local (MC) Bus Fairness On/Off Whether control of the local (Micro Channel) bus is released when it has been used it exclusively. Under normal circumstances, select <On>. <"On ">, Off |