604e Details

• SMP - 1-4 CPUs per node

• Memory/Cache:
  • L1 Data Cache: 32 KB
  • L1 Instruction Cache: 32 KB
  • L2 Cache: 256 KB
  • Up to 3 GB shared memory

• Separate Data Transfer Bus and Snoopy/Address Bus
  • Data crossbar switch which allows point-to-point access between each CPU and another CPU, and between each CPU and memory over 64 bit data bus.
  • Snooping traffic occurs separately from data transfer on the 32 bit address bus

• Superscalar - 7 execution units:
  • Single floating point unit
  • Three fixed point units
  • Branch Processing Unit with dynamic branch prediction
  • Condition Register Unit
  • Load/Store Unit