PROLINK COMPUTER, INC.

MVGA-TW32P+

Category                   Video/hard drive controller
Video Types Supported      XVGA
Video Processor            Tseng Laboratories, Inc.
Highest Resolution         1280 x 1024
Supported
Data Bus Type              PCI
Memory Type                DRAM
Maximum Onboard Memory     2MB

[Image]

                                CONNECTIONS

       Purpose            Location           Purpose           Location

  15-pin analog video       CN1        40-pin IDE (AT)            J3
  port                                 interface connector
                                       A

  VESA feature               J1        40-pin IDE (AT)            J4
  connector                            interface connector
                                       B

  IDE daughter board         J5        2-pin connector -         JP1
  connector                            drive 0,1 active
                                       LED

                                       2-pin connector -         JP16
                                       drive 2,3 active
                                       LED

                                   IRQ9

                 Setting                               JP14

  »               Disabled                             Open

                   Enabled                            Closed

                            DRAM CONFIGURATION

           Size                    Bank 0                  Bank 1

  »           1MB               (8) 256K x 4                None

              2MB               (8) 256K x 4            (8) 256K x 4

[Image]

OPTIONAL IDE CONTROLLER DAUGHTER CARD

                           IDE INTERRUPT SELECT

       IRQ            JP2            JP3           JP4           JP5

  »      INTA         Open          Open          Open          Closed

         INTB         Open          Open         Closed          Open

         INTC         Open         Closed         Open           Open

         INTD        Closed         Open          Open           Open

                                 IDE PORTS

                Setting                                JP10

  »               Disabled                       Pins 2 & 3 closed

                   Enabled                       Pins 1 & 2 closed

                       MISCELLANEOUS TECHNICAL NOTES

  The functions and settings of jumpers JP6-JP9, JP11-JP13, JP15 and JP16
                             are unidentified.