IMAGRAPH CORPORATION

TI-1210-4 (REVISION C & LATER)

Category                   Video
Video Types Supported      XVGA
Video Processor            TMS34010
Highest Resolution         1280 x 1024
Supported
Data Bus Type              16-bit ISA
Memory Type                DRAM/VRAM
Maximum Onboard Memory     512KB DRAM, 1536KB VRAM

[Image]

                                CONNECTIONS

      Purpose         Location             Purpose             Location

  9-pin video            CN1        VGA Pass-Through             CN2
  analog port                       connector

  FACTORY CONFIGURED - DO NOT ALTER

      Jumper            Position

        J2                Open

                           BASE ADDRESS SELECTION

  Address    J62    J63     J64      J65      J66      J67     J68     J69

  »   C700h  Open   Open   Closed   Closed   Open     Open     Open   Closed

      CC00h  Open   Open   Closed   Closed   Closed   Closed   Open   Open

      CF00h  Open   Open   Closed   Closed   Open     Open     Open   Open

      D700h  Open   Open   Closed    Open    Open     Open     Open   Closed

      DF00h  Open   Open   Closed    Open    Open     Open     Open   Open

                          EMULATION CONFIGURATION

                 Setting                                J7

  »                Enabled                             Open

                  Disabled                            Closed

                      VGA PASS-THROUGH CONFIGURATION

                 Setting                                JX1

  »               Disabled                             Open

                   Enabled                            Closed

  Note: Emulation jumper (J7) must be disabled when VGA Pass-Through is
  enabled.

                    FOURTH CABLE OUTPUT SYNC SELECTION

    Output from VGA          Output from          J4             J6
                             TI-1210-4

  »     Composite sync     Composite sync      Pins 1 & 2     Pins 1 & 2
           signal              signal           closed         closed

           Separate           Separate         Pins 2 & 3     Pins 2 & 3
       horizontal sync    horizontal sync       closed         closed

                       HOST BUS INTERRUPT SELECTION

        IRQ            J10        J11        J12        J13        J14

  »     Disabled       Open       Open       Open       Open       Open

           3           Open       Open       Open       Open     Pins 1 &
                                                                    2

           4           Open       Open       Open     Pins 1 &     Open
                                                         2

           5           Open       Open     Pins 1 &     Open       Open
                                              2

           6           Open     Pins 1 &     Open       Open       Open
                                   2

           7         Pins 1 &     Open       Open       Open       Open
                        2

           10          Open       Open       Open       Open     Pins 2 &
                                                                    3

           11          Open       Open       Open     Pins 2 &     Open
                                                         3

           12          Open       Open     Pins 2 &     Open       Open
                                              3

           14          Open     Pins 2 &     Open       Open       Open
                                   3

           15        Pins 2 &     Open       Open       Open       Open
                        3

  Note: Pins designated should be in the closed position.