ATRONICS INTERNATIONAL, INC.

486/B2

Processor            80486SX/80487SX/80486DX/ODP486SX/80486DX2
Processor Speed      20/25/33/40(internal)/50(internal)/50/66(internal)MHz
Chip Set             UMC
Max. Onboard DRAM    64MB
Cache                32/64/128/256KB
BIOS                 AMI
Dimensions           330mm x 218mm
I/O Options          32-bit external memory card slot
NPU Options          4167

[Image]

                                CONNECTIONS

  Purpose                 Location     Purpose                  Location

  External battery           J4        32-bit external             S1
                                       memory card

  Turbo switch               J5        Reset switch                W7

  Speaker                    J6        Turbo LED                  W11

  Power LED & keylock        J7

                        USER CONFIGURABLE SETTINGS

                Function                     Jumper          Position

  »   CPU speed select iOSC/1                 JPX20          pins 2 & 3
                                                              closed

      CPU speed select iOSC/2                 JPX20          pins 1 & 2
                                                              closed

  »   Monitor type select color                W8            pins 1 & 2
                                                              closed

      Monitor type select monochrome           W8            pins 2 & 3
                                                              closed

              DRAM CONFIGURATION

      Size          Bank 0          Bank 1

      1MB         (4) 256K x 9       NONE

      2MB         (4) 256K x 9   (4) 256K x 9

      4MB         (4) 1M x 9         NONE

      5MB         (4) 256K x 9    (4) 1M x 9

      8MB         (4) 1M x 9      (4) 1M x 9

      16MB        (4) 4M x 9         NONE

      20MB        (4) 1M x 9      (4) 4M x 9

      32MB        (4) 4M x 9      (4) 4M x 9

                         DRAM JUMPERCONFIGURATION

          Size                     JP2                      JP3

  On board memory used      pins 2 & 3 closed        pins 2 & 3 closed

    No on board memory      pins 1 & 2 closed        pins 1 & 2 closed
          used

                            CACHE CONFIGURATION

       Size              Bank 0           Bank 1          TAG (U4, U8 &
                                                              U16)

       32KB            (4) 8K x 8          NONE            (3) 16K x 4

       64KB            (4) 8K x 8       (4) 8K x 8         (3) 16K x 4

       128KB          (4) 32K x 8          NONE            (3) 16K x 4

       256KB          (4) 32K x 8       (4) 32K x 8        (3) 16K x 4

  Note : If more then 16MB of DRAM is being cached, an additional 16K x 4
  TAG chip must be installed at U12.

                  CACHE JUMPER CONFIGURATION

  Size      W1       W2       W3       W4       W5      W10

  32KB     2 & 3   2 & 3    2 & 3    2 & 3    2 & 3    2 & 3

  64KB     1 & 2   2 & 3    2 & 3    1 & 2    1 & 2    1 & 2

  128KB    2 & 3   2 & 3    1 & 2    2 & 3    1 & 2    1 & 2

  256KB    1 & 2   1 & 2    1 & 2    1 & 2    1 & 2    1 & 2

  Note : Pins designated should be in the closed position,

                          CPU TYPE CONFIGURATION

      Type           JPX9          JPX11         JPX12          JPX13

    80486SX       pins 2 & 3     pins 1 & 2    pins 1 & 2     pins 1 & 2
                    closed        closed         closed         closed

    ODP486SX      pins 1 & 2     pins 2 & 3    pins 2 & 3     pins 1 & 2
                    closed        closed         closed         closed

    80487SX       pins 1 & 2     pins 2 & 3    pins 2 & 3     pins 1 & 2
                    closed        closed         closed         closed

    80486DX       pins 2 & 3     pins 2 & 3    pins 2 & 3     pins 2 & 3
                    closed        closed         closed         closed

    80486DX2      pins 2 & 3     pins 2 & 3    pins 2 & 3     pins 2 & 3
                    closed        closed         closed         closed